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in at water. Downwind, if you can surf (downwind in a Laser, for example), the waves may help you sail faster. However, if you are planing freely (for example, in a 49er), waves will slow you down and you should avoid them. You need to weigh up the current conditions (and future predictions) when choosing where to start on the line. Remember, being a small way down from the favoured end will probably make it easier to nd some space to accelerate into. After the race, try and sit down to work out whether you feel you made the correct decision and always try and learn from your mistakes! You will nd that you will visit some venues repeatedly, and that the race area, dates of the regatta and start times may well be similar.

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(A.32)

Certain CPU architectures such as Intel s IA-64 64-bit architecture actually allow almost any instruction in the instruction set to execute conditionally. In IA-64 (also known as Itanium2) this is implemented using a set of 64 available predicate registers that each store a Boolean specifying whether a particular condition is True or False. Instructions can be prefixed with the name of one of the predicate registers, and the CPU will only execute the instruction if the register equals True. If not, the CPU will treat the instruction as a NOP.

The following sections describe the two IA-32 instruction groups that enable branchless logic implementations under IA-32 processor.

There are three central second moments of g(X, Y ). The rst is E[(X X )2 ] = = Similarly, the second is The third is Cov [X, Y ] = X,Y = E[(X X )(Y Y )] =

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Set Byte on Condition (SETcc)

SETcc is a set of instructions that perform the same logical flag tests as the conditional jump instructions (Jcc), except that instead of performing a jump, the logic test is performed, and the result is stored in an operand. Here s a quick example of how this is used in actual code. Suppose that a programmer writes the following line:

( X )2 fX,Y ( , ) d d (A.33)

The start is the beginning of the race, not the end. There is no point winning the port end of the line if you miss the rst shift. When lots of boats are being OCSed, a more cautious approach may be advisable as, especially early on in the series, it may not be

return (result != FALSE);

In case you re not entirely comfortable with C language semantics, the only difference between this and the following line:

( X ) fX ( ) d = Var[X]

return result;

E[(Y Y )2 ] = Var[Y ]

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is that in the first version the function will always return a Boolean. If result equals zero it will return one. If not, it will return zero, regardless of what value result contains. In the second example, the return value will be whatever is stored in result.

Without branchless logic, a compiler would have to generate the following code or something very similar to it:

(A.34)

cmp jne mov ret NotEquals: mov ret [result], 0 NotEquals eax, 0

eax, 1

(A.35)

Using the SETcc instruction, compilers can generate branchless logic. In this particular example, the SETNE instruction would be employed in the same way as the JE instruction was employed in the previous example:

This is called the covariance of the two variables. The notation Cov should not be confused with the abbreviation COV for the coef cient of variation. To reduce confusion, we have usually used the symbol for the latter. A further problem is that the units of the covariance are the same as those for the variance, which is 2 . It is unfortunate that the symbol with appropriate subscripts is used for both the standard deviation and covariance, even though they have different units, but that is the convention that has grown up over the yeas. The dimensionless expression of the degree of correlation between two variables is expressed by the correlation coef cient: X,Y = X,Y X Y (A.36)

The use of the SETNE instruction in this context provides an elegant solution. If result == 0, EAX will be set to zero. If not, it will be set to one. Of course, like Jcc, the specific condition in each of the SETcc instructions is based on the conditional codes described earlier in this chapter.

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